The multiprocessor system which includes plural processing parts has become widespread. For example, a multi-core processor in which plural processor cores (CPU cores) are incorporated into a single package and the processor cores perform processes independently, and a multiprocessor apparatus, which includes plural processors such as CPUs, etc., are known.
In general, the multiprocessor system includes a common resource to which the processing parts has access. For example, the common resource includes a RAM, an I/O device (I/O ports and a control device thereof), an A/D converter, etc. When the processing part accesses such a common resource, it is necessary to perform exclusive control for permitting the processing part to occupy (maintain) the access to the common resource for a certain period while preventing the accesses from other processing parts. The occupation right of the access is called as semaphore, etc.
Patent Document 1 discloses the multiprocessor system which performs the exclusive control and aims to prevent the generation of a deadlock. The deadlock occurs when the processes wait for the release of the resources which are occupied by one of the other processes and thus the processing stops. The multiprocessor system includes an exclusive control management table in which task names of a task which is currently under the exclusive control and a task which is currently in a status waiting for acquisition are stored on a common resource basis, and an exclusive control common resource information table in which names of the common resources which are currently being used under the exclusive control are stored. In this case, when a certain task issues a system call of a acquisition request of the common resource, it is determined in advance whether the deadlock would occur based on the contents of the exclusive control management table and the exclusive control common resource information table. If it is determined that the deadlock would occur if the acquisition request of the common resource were made as usual, the acquisition request of the common resource is not made.
Patent Document 2 discloses a multiprocessor system with a plurality of unit processors and includes an HW semaphore unit which sets a plurality of semaphores corresponding to a resource so as to be identifiable, and determines whether or not to request a semaphore being acquired by a second unit processor when a first unit processor makes the acquisition request for the semaphore to the HW semaphore unit, and a program control unit which places the request from the first unit processor in standby, if it is determined that the request requests the semaphore being acquired.    [Patent Document 1] Japanese Laid-open Patent Publication No. 7-105152    [Patent Document 2] Japanese Laid-open Patent Publication No. 2007-188397
Recently, in a field of an on-vehicle control apparatus installed on a vehicle, there may be a trend to integrate one control apparatus for controlling one on-vehicle device with another control apparatus for controlling another on-vehicle device (for example, integrate a control apparatus for a transmission with a control apparatus for an engine) to downsize computer hardware, thereby reducing cost and weight. The multiprocessor system with the processing parts is preferably used in order to integrate the hardware. In this case, the processing parts of the multiprocessor system execute the programs which were executed by the control apparatuses, respectively, and each of control apparatuses is implemented by a single processor.
In the single processor, as an ordinary configuration of source code, in order to maintain consistency of the resource (object to be accessed, such as a RAM, etc.), DI (Disable Interrupt) is executed during the access to the resource for writing of the data, etc. FIG. 1 is a diagram for illustrating a way of disabling the interrupt while a function A (indicated by FuncA in FIG. 1) in the single processor accesses the resource. In FIG. 1, variables X, Y and Z are parameters written in the RAM, for example. Further, PE stands for Processor Element which is an example of a CPU or other processing part.
Even if such processing is applied to the multiprocessor system directly, it is not possible to implement the exclusive control. This is because other PEs 2 and 3 can access the common resource even if the interrupt by the PE1 is disabled. FIG. 2 is a diagram for illustrating a situation in which the PEs 2 and 3 can access the common resource while the interrupt by the PE1 is disabled.
By nature, in order to perform the exclusive control for the common resource in the multiprocessor system, it should be designed at a system design stage in a software develop process. However, in practice, it is not easy to apply the design for the exclusive control to the complicated control software operated on the single processor.
Here, it may be easy to use a section between the DI (Disable Interrupt) and the EI (Enable Interrupt) directly as an occupation section of the common resource by the PE. However, in this case, a distinction of the common resource is not easy, and thus there may be a PE which is in the waiting status, even though its access request is not competing with others. FIG. 3 is a diagram for illustrating a situation in which the occupation of the common resource occurs between the DI and the EI of the PE1, and thus the function of the PE2 becomes in the waiting status. In the case of FIG. 3, since the function B accesses the variable Z which the function A does not access, the function B could have accessed the common resource by its nature concurrently with the access of the function A.
In this way, if the programs executed in the single processors are ported to the multiprocessor system, the modification of the programs due to the design of the exclusive control becomes complicated.
The multiprocessor systems such as disclosed in Patent Document 1, etc., do not consider such portability (i.e., assume the programs are designed specifically for the multiprocessor system) and thus do not have configurations suited for the porting from the single processors to the multiprocessor systems. Further, consequently, if the function is extended by adding a new program, etc., the modification of the program becomes complicated.